Polysix MIDI update - CPU board netlist (c) Copyright 1997 Ricard Wolf ======================================= (Corrections added 10/3 '99) CPU buses --------- Function Z80 6264 27128 8255-I 8255-II 6850 LS139 LS00 D0 14 11 11 34 34 22 - - D1 15 12 12 33 33 21 - - D2 12 13 13 32 32 20 - - D3 8 15 15 31 31 19 - - D4 7 16 16 30 30 18 - - D5 9 17 17 29 29 17 - - D6 10 18 18 28 28 16 - - D7 13 19 19 27 27 15 - - A0 30 10 10 9 9 11(RS) - - A1 31 9 9 8 8 - - - A2 32 8 8 - - - 2 - A3 33 7 7 - - - 3 - A4 34 6 6 - - - - - A5 35 5 5 - - - - - A6 36 4 4 - - - - - A7 37 3 3 - - - - - A8 38 25 25 - - - - - A9 39 24 24 - - - - - A10 40 21 21 - - - - - A11 1 23 23 - - - - - A12 2 2 2 - - - - - A13 3 - 26 - - - - - A14 4 - - - - - 14 - A15 5 - - - - - 13 - RD* 21 22 - 5 5 - - 1 WR* 22 27 - 36 36 13 - 2 MREQ* 19 - - - - - 15 - IORQ* 20 - - - - - 1 - E - - - - - 14 - 3 +5V, 0V and nc -------------- Z80: +5V: 11 (Vcc), 24 (WAIT*), 25 (BUSRQ*) (WAIT* and BUSRQ* via 1k) 0V: 29 (GND) nc: 27 (M1*), 28 (RFSH*), 18 (HALT*), 23 (BUSAK*) 6264: battery+: 28 (Vcc) 0V: 14 (GND) nc: 1 (nc) 27128: +5V: 28 (Vcc), 27 (PGM*) 0V: 14 (GND), 20 (CE*), 1 (Vpp) 8255: +5V: 26 (Vcc) (I & II) 0V: 7 (GND) 6850: +5V: 12 (Vcc), 8 (CS0), 10 (CS1) 0V: 1 (Vss), 23 (DCD*), 24 (CTS*) nc: 5 (RTS*) LS393-I: +5V: 14 (Vcc) 0V: 7 (GND), 2, 12 (RESa, RESb) nc: 5, 9, 10, 11 (unused outputs) LS393-II: +5V: 14 (Vcc) 0V: 7 (GND) nc: 3, 4, 5, 8, 9, 10, 11 (unused outputs) LS139: +5V: 16 (Vcc) 0V: 8 (GND) nc: 7,10,11 (unused outputs) LS04: +5V: 14 (Vcc), 11 (unused input, via 4k7) 0V: 7 (GND) nc: 10 (unused output) LS00: +5V: 14 (Vcc) 0V: 7 (GND) TIL111: 0V: 4 nc: 3, 6 (base, nc) 8 MHz oscillator ---------------- Function LS04 Xtal 1k-1 1k-2 1nF - 1 * * - - - 2 - * - * - 3 - - * * - 4,5 * - * - output 6 - - - - to LS393-I pin 1 Clocks ------ Function LS393-I LS393-II Z80 6850 Comments 8MHz 1 (CPa) - - - Output from xtal osc 4MHz 3 (Q0a) - 6 - CPU clock 2MHz 4 (Q1a) - - 3,4 MIDI time base 1953Hz - 6,13 (Q3a) 17 - CPU timer interrupt (NMI) (500kHz) 6,13 - - - Clock divider chain link (31.25kHz) 8 1 - - Clock divider chain link Interrupts ---------- Function Z80 LS393-II 6850 Comments NMI* 17 6,13 - Timer interrupt (see clocks section) INT* 16 - 7 (IRQ) ACIA serial communication interrupt, with 4k7 pullup to +5V MIDI Rx-Tx ---------- Function 6850 LS04 LS00 TIL111 TxD 6 9 - - (o/p buf) - 8 4,5 - MIDI output - - 6 - to MIDI OUT via 220 ohm MIDI in+ - - - 1 from MIDI IN via 220 ohm MIDI in- - - - 2 from MIDI IN RxD 2 - 12,13 5 also 1k pullup to +5V (thru buf) - - 9,10,11 - MIDI thru - - 8 - to MIDI THRU via 220 ohm Note: - 1N4148 diode connected across TIL111 pins 1 and 2 (cathode to 1, anode to 2) - MIDI OUT and THRU each receive +5V via their own 220 ohm resistor. Reset ----- Function Z80 8255-I 8255-II LS393-II 6264 LS04 Comments RESET* 26 - - - 26(CS) 13 From Polysix board RESET - 35 35 2,12(RESa,b) - 12 Non-inverted reset Chip select ----------- Function LS139 6850 8255-I 8255-II 27128 6464 ACIASEL* 4 9(CS2*) - - - - IOSEL1* 5 - 6(CS*) - - - IOSEL2* 6 - - 6(CS*) - - - 7 - - - - - ROMSEL* 12 - - - 22(OE*) - - 11 - - - - - - 10 - - - - - RAMSEL* 9 - - - - 20(CS*) Pullups ------- All PB and PC lines on the 8255 chips have 4k7 pullups to +5V, utilizing four 8-resistor resnets, i.e. pins 10..17 and 18..25 on both chips. Apart from these, there are two other pullups: one for the opto coupler (1k) and one for the 6850 IRQ pin (4k7), as noted above. Finally there are two pullups for unused inputs: one 1k for the Z80 CPU WAIT* and BUSRQ* inputs, and one 4k7 for the LS04, as noted above. Decoupling ---------- 10nF connected between +5V and 0V at each chip. 10nF between pins 28 and 14 on 6264. 220uF/16V between +5V and 0V where power enters board.